Design and Demonstration of Sic 3d Stacked Power Module With Superior Electrical Parasitics and Thermal Performances

By Lee, Haksun

Georgia Institute of Technology

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Abstract

Advisors: Rao R Tummala, Vanessa Smet, Madhavan Swaminathan, Yogendra Joshi, Maryam Saeedifard, Shyh-Chiang Shen

The objectives of this research were to design and demonstrate a new class of ultra-low parasitics, 3D power module for EV/HEV applications with high dv/dt capability, and enhanced thermal management. In order to address the challenges associated with SiC power module packaging technologies including, switching waveform distortion (overshoot and resonance) by parasitic inductance, high-level of noise generated from increased dv/dt and parasitic capacitance, and high-thermal densities that could potentially aggravate package reliability, a leadframe-based 3D stacked power module design was introduced and demonstrated. This unique approach is highly modular and compatible with current and future manufacturing infrastructures and processes, making it a suitable manufacturing process for low-cost, high-volume mass production, and yielding a compact 3D stacked package.

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Researchers should cite this work as follows:

  • Lee, Haksun (2021), "Design and Demonstration of Sic 3d Stacked Power Module With Superior Electrical Parasitics and Thermal Performances," https://matin.gatech.edu/resources/4039.

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